The present invention relates to a semiconductor circuit, and more particularly, to a circuit for discharging static electricity, which is connected between an internal circuit and an input/output pad to provide a charge device model (CDM) discharging path.
Generally, electrostatic discharge (ESD) is a rapid flow of electric current when two mutually insulated objects with significantly different potentials come into direct contact with each other and an electrostatic discharging circuit is formed between an internal circuit of a semiconductor chip and a pad to be connected with input/output pins for preventing destruction or degradation of a product due to static electricity when designing a semiconductor device.
When a high voltage ESD current is introduced to an internal circuit of a semiconductor device with a designed power voltage of lower than 5V, circuit devices may be critically damaged. Therefore, it is necessary to provide a path through which the ESD current flows without destructing an internal circuit of the semiconductor device and the path through which the ESD current flows should be capable of discharging the static electricity efficiently within a short time.
Meanwhile, in semiconductor devices, ESD phenomenon is tested largely with a human body model (HBM), a machine model (MM) and a charge device model (CDM).
The HMB is for modeling a phenomenon that static electricity resulted from a human body is instantly discharged through the semiconductor device, the MM is for modeling a phenomenon that static electricity resulted from a machine is instantly discharged through the semiconductor device and the CDM is for modeling a phenomenon that static electricity accumulated in a device is instantly discharged to the outside when fabricating a semiconductor package.
Particularly, CDM charge has a direct influence on a product yield because an electric charge in a semiconductor device is discharged to the outside of the semiconductor device to destruct the semiconductor device in a fabrication process.
Therefore, semiconductor devices are provided with a circuit for discharging static electricity as shown in FIG. 1 or FIG. 2 in order to protect the semiconductor device from such CDM charge.
FIG. 1 shows a case that each internal circuit 20, 21 is connected with different input/output pads 10, 11. Independent electrostatic discharge circuits 30 and 31 are connected between respective internal circuits 20, 21 and respective input/output pads 10, 11.
Herein, the electrostatic discharge circuit 30 is a CDM electrostatic discharge circuit and this is for preventing damage when charges have been accumulated in the ground of a semiconductor device, electrostatic current is discharged through the internal circuit 20 to the input/output pad 10 to destruct the internal circuit 20 as a low potential is connected to the input/output pad 10.
The electrostatic discharge circuit 30 consists of Gate Ground NMOS (GGNMOS) transistor N1 connected with the ground at a gate and a source, and a resistor R1. Therefore, accumulated charges are discharged directly from the ground in the semiconductor device through the GGNMOS transistor N1 to the input/output pad 10, thereby protecting the internal circuit 20 from the electrostatic current.
Likewise, the electrostatic discharge circuit 31 consists of GGNMOS transistor N2 and a resistor R2, and electrostatic current is discharged directly from the ground in the semiconductor device through the GGNMOS transistor N2 to the input/output pad 11, thereby protecting the internal circuit 21 from the electrostatic current.
Meanwhile, FIG. 2 shows that each internal circuit 60, 61 is connected with the same input/output pad 50. Like in FIG. 1, independent electrostatic discharge circuits 70 and 71, which correspond to respective internal circuits 60 and 61, are connected between respective internal circuits 60 and 61 and the input/output pad 50, and electrostatic current is discharged directly from the ground in the semiconductor device through the electrostatic discharge circuits 70 and 71 to the input/output pad 50, thereby protecting the internal circuits 60 and 61 from the electrostatic current.
However, in the cases as shown in FIGS. 1 and 2, since independent electrostatic circuits are provided to the respective internal circuits, an area in the semiconductor which is occupied by the electrostatic circuit is increased. Further, a pin capacitance is increased due to a structure in which a transistor and a resistor are connected in parallel between an internal circuit and an input/output pad. Consequently, there is a problem that it is difficult to realize a small sized and high speed semiconductor device.